Alteraforum - alteraforum.com - Altera Forums
General Information:
Latest News:
Cyclone V - JTAG ID Error - download failed 27 Aug 2013 | 04:56 pm
Hi, I meet JTAG error while downloading the .sof file to the FPGA via "Programmer". It says that the JTAG Id isn't what the Programmer was expecting for. I use Cyclone V devloppement kit and Quartu...
Nios communicate with external dsp(dual port ram inside) 27 Aug 2013 | 02:36 pm
Recently I want to use Nios communicate with external device. The device is a RT-Ethernet chip,which have a ARM and dpram in ti.So FPGA and ARM will access the shared dpram. I don't know what should ...
NIOSII download problem 27 Aug 2013 | 02:06 pm
HI when I download my project , it generate an error , but I have no idea what is the error ? How do I solve it? 1.JPG Attached Images 1.JPG (38.0 KB)
usb driver not working in quartus 12.0 27 Aug 2013 | 01:41 pm
usb blaster drivers are not working with quartus 12.0 . it is giving "internal error 82". I install DLL file in "bin " folder still it is not working. drivers shows it is updated properly but while d...
Statix-V maximum clock speed 27 Aug 2013 | 09:42 am
What is the maximum clock speeds that Altera Stratix-V devices can handle in general? I have been using stratix-II and it could support clock speed upto 40 MHz.
MATLAB model to verilog HDL code conversion using Matlab's HDL workflow advisor 27 Aug 2013 | 06:38 am
Greetings, Im currently working on a project called Three phase induction motor using Space Vector Pulse Width modulation(SVPWM). The implementation part is through FPGA. I have a working MAtlab mode...
Programming multiple devices 27 Aug 2013 | 02:03 am
Hi, I have a board that is set up for In-System programming using the USB blaster. It contains two EP3C16Q240's and a single EPCS16 for programming the devices. I followed all of the instructions in ...
Beginner question Cyclone IV bank IO voltages 27 Aug 2013 | 12:20 am
Hello, I am working with an Altera FPGA (Cyclone IV E) for the first time ever and I am starting to draw the schematic. There is one question I can't figure out about the IO Bank voltages. I would li...
BeMicro SDK and uC/Probe 3.1 26 Aug 2013 | 11:28 pm
We just purchased the BeMicro SDK and are working through the SW lab. At Section 6.2 Setting Up uC/Probe, it appears that the documentation is out of date with the latest version of uC/Probe. I can't ...
NIOS II Standalone Operation 26 Aug 2013 | 11:20 pm
I have a NIOS II built using QSYS with ram/rom on a chip. I have my program running from the console under the NIOS II Software Build tools for eclipse. Now I want to run the NIOS untethered from my d...
