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Everything that you need to know about reset system design but probably dont 27 Aug 2013 | 08:30 pm
After almost 30 years as a product and IC designer I am still amused when I find two designers arguing over what type of reset system to design. These usually start off civil enough but quickly devolv...
what is better? 26 Aug 2013 | 10:21 am
hi all, for digital design , what is better:cadence or synopsys cad tools? i can complete digital design without synopsys , only with cadence?
cadence instead of synopsys 26 Aug 2013 | 08:52 am
hi all, i have one question ,i create a gate level netlist with synopsys, now i wont to know, have the cadence company any tools can used instead of synopsys tools?
"Class" - The Classical feature !! 25 Aug 2013 | 08:32 am
Dear Readers, Let's understand the classical feature of System Verilog 'Class'. Here I would try to explain on class feature, object properties and methods, object instantiation, class methods polymo...
DVCon Abstract Deadline: Tuesday, August 27 22 Aug 2013 | 11:43 pm
DVCon continues to be the premier conference for design and verification engineers of all experience levels. Compared to larger more general conferences, DVCon affords attendees a concentrated menu of...
Sidense Wiki 22 Aug 2013 | 07:13 am
Sidense Corp., founded in 2004, is a leading developer of silicon-proven embedded non-volatile memory (NVM) intellectual property (IP). Sidense's patented one-time programmable (OTP) memory enables a ...
Verification IP : Build vs Buy? 20 Aug 2013 | 10:41 am
Consumerism of electronic products is driving the SoC companies to tape out multiple variants of products every year. Demand for faster, low power, more functionality and interoperability is forcing t...
Micron Talks about their 3D DRAM Experience 17 Aug 2013 | 09:41 pm
An interesting read about 3D DRAM stack design over at EE Times. Micron Tells Story of Building DRAM Cube | EE Times Keeth and Jeddeloh developed a proposal to make a Gen-1 prototype that would deliv...
Carl Icahn Prints His Own Money, Today with Apple 14 Aug 2013 | 10:46 am
In the EDA world we were shocked when Carl Icahn made a hostile bid for Mentor Graphics in 2010, gained three seats on the board, then lost interest in taking over the company, all while making millio...
Step-down DC/DC Converter 12 Aug 2013 | 11:48 pm
We blog a lot about SoC design, however most electronic systems today require some sort of voltage converter to power the chips that are mounted on PCBs. At a recent EDA networking event I spoke with ...
